Job Description

Role Summary:

We are seeking an experienced Principal EDA/CAD Engineer to provide technical leadership for Renesas’ global engineering compute and design-data-management environment.

The role combines hands-on CAD engineering with responsibility for compute infrastructure, Perforce/IPLM-based design data management, project/workspace methodologies, automation, documentation, training and engineering support.

The successful candidate will work closely with engineering, CAD and infrastructure teams to develop scalable solutions for managing semiconductor design environments and design data across globally distributed engineering teams.

Key Responsibilities:

Compute Infrastructure & Engineering Environments

Provide technical leadership for engineering compute infrastructure and CAD environments.
Support the development and evolution of globally consistent Linux-based engineering environments.
Define requirements for compute, storage and supporting engineering infrastructure.
Work with IT/IS and engineering teams to ensure infrastructure meets semiconductor design requirements.
Support migration and consolidation of legacy engineering environments.
Troubleshoot complex infrastructure and engineering-environment issues.

Perforce & IPLM

Provide technical ownership and expertise for Perforce Helix and IPLM-based design-data-management methodologies.
Support Perforce/IPLM integration with EDA tools and engineering environments.
Develop methodologies for IP creation, versioning, release, reuse and lifecycle management.
Develop scalable approaches for managing both analog and digital design data.
Define data-management best practices and help engineering projects adopt them.

Project & Workspace Management

Develop and support standardized project and workspace environments.
Support project configuration, EDA tool configuration, environment variables and Cadence setup.
Create reusable methodologies for project creation and onboarding.
Improve consistency between engineering projects while allowing appropriate project-specific configuration.

Automation & Scripting

Develop automation for engineering environment and data-management workflows.
Create and maintain Python and shell-based utilities.
Reduce manual project setup and administration through automation.
Improve the reliability, maintainability and scalability of CAD infrastructure processes.

Legacy Data & Environment Migration

Develop methodologies for migrating engineering data from legacy infrastructures.
Support transitions from existing data-management platforms to strategic solutions based around Perforce/IPLM.
Assist engineering teams moving projects, design data and methodologies between environments.
Maintain appropriate support for legacy environments during transition.

Documentation, Training & User Adoption

Develop and maintain technical documentation, user guides and engineering best practices.
Create and deliver training for engineering compute and design-data-management environments.
Support onboarding of projects and engineering teams.
Provide expert-level escalation support for complex CAD and data-management issues.
Capture specialist knowledge in maintainable documentation and repeatable processes.

Technical Strategy

Contribute to the roadmap for engineering compute and design-data-management infrastructure.
Evaluate new technologies and methodologies for engineering data management.
Work across CAD, engineering and IS organizations to establish sustainable ownership boundaries.
Help move engineering environments toward standardized, scalable and globally supportable solutions.

Qualifications

Required Skills & Experience:

Significant experience in EDA/CAD engineering, semiconductor design infrastructure or engineering compute environments.
Strong Linux/Unix knowledge.
Strong understanding of engineering compute, storage and data-management environments.
Experience with Perforce Helix (P4) or comparable enterprise version-control/data-management technologies.
Methodics IPLM or equivalent IP lifecycle-management experience.
Experience with semiconductor EDA workflows.
Strong Python and/or shell scripting skills.
Experience supporting complex engineering project environments.
Excellent troubleshooting and root-cause-analysis skills.
Ability to work effectively across engineering and IT/infrastructure organizations.
Strong documentation and technical communication skills.

Highly Desirable:

Perforce administration and architecture experience.
Cadence/Virtuoso knowledge.
Understanding of analog and digital semiconductor development flows.
Experience migrating from DesignSync/Synchronicity, Cliosoft/SOS or other legacy DM platforms.
Experience with large-scale Linux compute environments.
Experience developing CAD methodology and engineering automation.
Experience delivering technical training to engineering teams.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .

Principal EDA Engineer

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